The following code is executed by an ARM processor: Assume that a 1-bit branch predictor is used

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The following code is executed by an ARM processor: 

B1 B2 MOV MOV SUB SUBS BNE B2 SUBS r0, r0, #1 BNE B1 r0, #4 r2, #5 r2, r2, ro r2, r2, #1 ;Branch 1 ;Branch 2

Assume that a 1-bit branch predictor is used for both branch 1 and branch 2 and that both predictors are initially set to N. Complete the following table by running through this code. 

23 46849SAWN Branch Branch Branch Branch Cycle prediction outcome Cycle prediction outcome 1 N N N T Branch 1

Repeat the same exercise with the same initial conditions but assume a 2-bit saturating counter branch predictor.

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