The relative frequency of different addressingmodes impacts the choices of addressing modes support for an instruction set architecture. Figure A.7 illustrates the relative frequency of addressing modes for three applications on the VAX.

a. Compile one or more programs from the SPEC CPU2017 or EEMBC benchmark suites to target the x86 architecture. Using a disassembler, inspect the instructions and the relative frequency of various addressing modes. Create a histogram to illustrate the relative frequency of the addressing modes. How do your results compare to Figure A.7?

b. Compile one or more programs from the SPEC CPU2017 or EEMBC benchmark suites to target the RISC-V architecture. Using a disassembler, inspect the instructions and the relative frequency of various addressing modes. Create a histogram to illustrate the relative frequency of the addressing modes. How do your results compare to Figure A.7?

Figure A.7

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Tex 1% Memory indirect spice 1% gcc TeX 0% Scaled spice gcc Tex Register indirect spice gcc Tex Immediate spice gcc Tex Displacement spice gcc 0% 6% 6% 3% 11% 10% 16% 17% 24% 32% 43% 39% 40% 40% 20% 30% Frequency of the addressing mode 50% 55% 60%