Does not discuss I-type instructions like addi or andi.

1. What additional logic blocks, if any, are needed to add I-type instructions to the CPU shown in Figure 4.21? Add any necessary logic blocks to Figure 4.21 and explain their purpose.

2. List the values of the signals generated by the control unit for addi. Explain the reasoning for any “don’t care”

control signals.

Figure 4.21

Transcribed Image Text:

PC Add Read address Instruction (31-01 Instruction [31-26] Instruction [25-21] Instruction [20-16] Instruction Instruction [15-11] memory Control Instruction [15-0] RegDst Branch MemRead MemtoReg ALUOP MemWrite ALUSro RegWrite Read register 1 Read data 1 Read register 2 Write Read register data 2 Write data Registers 16 Sign- extend 32 Instruction [5-0] Shift left 2, MUX ALU Add, result ALU control Zero ALU result ALU o Max Read data Address Data Write data memory MX