A group of students were debating the efficiency of the five-stage pipeline when one student pointed out
Question:
A group of students were debating the efficiency of the five-stage pipeline when one student pointed out that not all instructions are active in every stage of the pipeline. After deciding to ignore the effects of hazards, they made the following four statements. Which ones are correct?
1. Allowing jumps, branches, and ALU instructions to take fewer stages than the five required by the load instruction will increase pipeline performance under all circumstances.
2. Trying to allow some instructions to take fewer cycles does not help, since the throughput is determined by the clock cycle;
the number of pipe stages per instruction affects latency, not throughput.
3. You cannot make ALU instructions take fewer cycles because of the write-back of the result, but branches and jumps can take
Step by Step Answer:
Computer Organization And Design MIPS Edition The Hardware/Software Interface
ISBN: 9780128201091
6th Edition
Authors: David A. Patterson, John L. Hennessy