Exercise 4.20 Problems in this exercise refer to the following instruction sequences:

Instruction sequence

a. lw $1,40($2)

add $2,$3,$3 add $1,$1,$2 sw $1,20($2)

b. add $1,$2,$3 sw $2,0($1)

lw $1,4($2)

add $2,$2,$1 4.20.1 [5] <4.7> Find all data dependences in this instruction sequence.

4.20.2 [10] <4.7> Find all hazards in this instruction sequence for a fi ve-stage pipeline with and then without forwarding.

4.20.3 [10] <4.7> To reduce clock cycle time, we are considering a split of the MEM stage into two stages. Repeat Exercise 4.20.2 for this six-stage pipeline.

The remaining three problems in this exercise assume that, before any of the above is executed, all values in data memory are 0s and that registers $0 through $3 have the following initial values:

$0 $1 $2 $3

a. 0 1 31 1000

b. 0 –2 63 2500 4.20.4 [5] <4.7> Which value is the fi rst one to be forwarded and what is the value it overrides?

4.20.5 [10] <4.7> If we assume forwarding will be implemented when we design the hazard detection unit, but then we forget to actually implement forwarding, what are the fi nal register values after this instruction sequence?

4.20.6 [10] <4.7> For the design described in Exercise 4.20.5, add nops to this instruction sequence to ensure correct execution in spite of missing support for forwarding.
Exercise 4.21 This exercise is intended to help you understand the relationship between forwarding, hazard detection, and ISA design. Problems in this exercise refer to the following sequences of instructions, and assume that it is executed on a fi ve-stage pipelined datapath:
Instruction sequence

a. lw $1,40($6)
add $2,$3,$1 add $1,$6,$4 sw $2,20($4)
and $1,$1,$4

b. add $1,$5,$3 sw $1,0($2)
lw $1,4($2)
add $5,$5,$1 sw $1,0($2)
4.21.1 [5] <4.7> If there is no forwarding or hazard detection, insert nops to ensure correct execution.
4.21.2 [10] <4.7> Repeat Exercise 4.21.1 but now use nops only when a hazard cannot be avoided by changing or rearranging these instructions. You can assume register R7 can be used to hold temporary values in your modifi ed code.
4.21.3 [10] <4.7> If the processor has forwarding, but we forgot to implement the hazard detection unit, what happens when this code executes?
4.21.4 [20] <4.7> If there is forwarding, for the fi rst fi ve cycles during the execution of this code, specify which signals are asserted in each cycle by hazard detection and forwarding units in Figure 4.60.
4.21.5 [10] <4.7> If there is no forwarding, what new inputs and output signals do we need for the hazard detection unit in Figure 4.60? Using this instruction sequence as an example, explain why each signal is needed.
4.21.6 [20] <4.7> For the new hazard detection unit from Exercise 4.21.5, specify which output signals it asserts in each of the fi rst fi ve cycles during the execution of this code.