In this exercise we examine in detail how an instruction is executed in a single-cycle datapath. Problems in this exercise refer to a clock cycle in which the processor fetches the following instruction word:
10101100011000100000000000010100.
Assume that data memory is all zeros and that the processor€™s registers have the following values at the beginning of the cycle in which the above instruction word is fetched:

1. What are the outputs of the sign-extend and the jump €œShift left 2€ unit (near the top of Figure 4.24) for this instruction word?

Figure 4.24

2. What are the values of the ALU control unit€™s inputs for this instruction?

3. What is the new PC address aft er this instruction is executed? Highlight the path through which this value is determined.

4. For each Mux, show the values of its data output during the execution of this instruction and these register values.

5. For the ALU and the two add units, what are their data input values?

6. What are the values of all inputs for the €œRegisters€ unit?

Transcribed Image Text:

ro r1 r2 r3 r4 r5 r6 r8 r12 r31 -1 -3 10 2 -4 -16 Instruction [25-0] Jump address [31-0] Shift left 2 26 28 0. PC + 4 [31-281 Add Add ALU result Shift left 2 RegDst Jump Branch MemRead MemtoReg ALUOP MemWrite ALUSrc RegWrite Instruction [31-26] Control Instruction [25-21] Read Read address register 1 PC |Instruction [20–16] Read data 1 Read register 2 Zero ALU ALU Instruction [31-0] Write Read Read data Address result Instruction [15-11] Instruction register data 2 memory Write data Registors Write Data data memory Instruction [15-0] 16 Sign- 32 ALU extend control Instruction [5-0]