Using a multilevel page table can reduce the physical memory consumption of page tables, by only keeping

Question:

Using a multilevel page table can reduce the physical memory consumption of page tables, by only keeping active PTEs in physical memory. How many levels of page tables will be needed in this case? And how many memory references are needed for address translation if missing in TLB?

In this exercise, we will examine space/time optimizations for page tables. The following table shows parameters of a virtual memory system. a. b. Virtual Address (bits) 43 38 Physical DRAM Installed 16 GB 8 GB Page Size 4 KB 16 KB PTE Size (byte) 4 4