The complementer shown in Fig. 10-1 is not needed if instead of performing A + B̅ + 1 we perform B+ A̅ (B plus the 1's complement of A). Derive an algorithm in flowchart form for addition and subtraction of fixed-point binary numbers in signed-magnitude representation with the magnitudes subtracted by the two microoperations A←A̅ and EA←A + B.

Fig. 10-1

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E AVF B₁ Output carry 3 B register Complementer Parallel adder A register Input carry M (Mode control) Load sum