Question: The following control inputs are active in the bus system shown in Fig. 5-4. For each case, specify the register transfer that will be executed

The following control inputs are active in the bus system shown in Fig. 5-4. For each case, specify the register transfer that will be executed during the next clock transition.

a. b. C. d. S S So 1 1 1 1 1 0 0 0 1000 0 LD of register IR PC DR AC Memory Adder Read Write - Add

Fig. 5-4

a. b. C. d. S S So 1 1 1 1 1 0 0 0 1000 0 LD of register IR PC DR AC Memory Adder Read Write - Add

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