Only the popq instruction uses both register file write ports simultaneously. For the instruction popq %rsp, the same address will be used for both the E and M write ports, but with different data. To handle this conflict, we must establish a priority among the two write ports so that when both attempt to write the same register on the same cycle, only the write from the higher-priority port takes place. Which of the two ports should be given priority in order to implement the desired behavior, as determined in Practice Problem 4.8?

Problem 4.8

The following assembly-code function lets us determine the behavior of the instruction popq %rsp for x86-64:

We find this function always returns 0xabcd. What does this imply about the behavior of popq %rsp? What other Y86-64 instruction would have the exact same behavior?

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1 2 3 5 6 7 8 text .globl poptest poptest: movq pushq popa movq movg ret %rap, %rdi $0xabcd %rsp %rap. %rax %rdi. %rsp Save stack pointer Push test value Pop to stack pointer Set popped value as return value Restore stack pointer