Finite state machines (FSMs), like the ones you built in Chapter 3, can also be implemented in software.(a) Implement the traffic light FSM from Figure 3.25 using MIPS assembly code. The inputs (TA and TB) are memory-mapped to bit 1 and bit 0, respectively, of address 0xFFFFF000. The two 3-bit outputs (LA and LB) are mapped to bits 0?2 and bits 3?5, respectively, of address 0xFFFFF004. Assume one-hot output encodings for each light, LA and LB; red is 100, yellow is 010, and green is 001.?

(b) Draw a schematic for this memory-mapped I/O system.(c) Write HDL code to implement the address decoder for your memory-mapped I/O system.?

Transcribed Image Text:

Reset TA so LA: green Le red S1 Lai yellow) Lg: red S3 LA: red Lei yellow, S2 La: red Lg: green Te