Question: Synthesize the behavioral model of the 2s complement multiplier (Figure 4-35) using whatever synthesis tool you have available. Then synthesize the model with control signals

Synthesize the behavioral model of the 2’s complement multiplier (Figure 4-35) using whatever synthesis tool you have available. Then synthesize the model with control signals (Figure 4-40) and compare the results (number of flip-flops, number of LUTs, number of slices, etc.). Try different synthesis options such as optimizing for area or speed, and different finite-state machine encoding algorithms such as one-hot, compact, and so forth and compare the results. Which combination of options uses the least resources?

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Using the Xilinx ISE targeted for a Spartan 3 FPGA Figure 440 uses fewer resources ... View full answer

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