This problem concerns the design of a digital system that converts an 8-bit signed integer (negative numbers
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This problem concerns the design of a digital system that converts an 8-bit signed integer (negative numbers are represented in 2’s complement) to a floating-point number. Use a floating-point format similar to the ones used in Section 7.1.1 except that the fraction should be 8 bits and the exponent 4 bits. The fraction should be
properly normalized.
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Related Book For
Digital Systems Design Using Verilog
ISBN: 978-1285051079
1st edition
Authors: Charles Roth, Lizy K. John, Byeong Kil Lee
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