Write a behavioral Verilog code for a floating-point multiplier using the IEEE single precision floating-point format. Use
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Write a behavioral Verilog code for a floating-point multiplier using the IEEE single precision floating-point format. Use an overloaded multiplication operator instead of using an add-shift multiplier. Ignore special cases such as infinity, denormalized, and not-a-number formats. Truncate the final result instead of rounding.
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Shameen Tahir
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Related Book For 
Digital Systems Design Using Verilog
ISBN: 978-1285051079
1st edition
Authors: Charles Roth, Lizy K. John, Byeong Kil Lee
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