Design a combinational circuit using a minimum number of 74138s (3  8 decoders) to generate the minterms m1, m5, and m9 based on four switch inputs S3, S2, S1, S0. Then display the selected minterm number (1 or 5 or 9) on a seven segment display by generating a 4-bit input ( W, X, Y, Z) for a BCD to seven segment code converter. Ignore the display for all other minterms. Note that these four inputs ( W, X, Y, Z) can be obtained from the selected output line (1 or 5 or 9) of the decoders that is generated by the four input switches (S3, S2, S1, S0). Use a minimum number of logic gates. Determine the truth table, and then draw a block diagram of your implementation by connecting the following building blocks (Figure P4.16): 

b. 3-to-8 BCD to X. A decoder 3 Seven-Segment 74138 Code Converter (7447) G1 G2A G2B Common-anode