A sequential circuit is given in Figure 4-13.

Figure 4-13

(a) Add the necessary logic and/or connections to the circuit to provide an asynchronous reset to state A = 1, B = 0 for signal Reset = 0.

(b) Add the necessary logic and/or connections to the circuit to provide a synchronous reset to state A = 0, B = 0 for signal Reset = 1.

X Clock D D B IB