A computer system has a main memory consisting of 1M 16-bit words. It also has a 4K-word cache organized in the block-set-associative manner, with 4 blocks per set and 64 words per block.

(a) Calculate the number of bits in each of the TAG, SET, and WORD fields of the main memory address format.

(b) Assume that the cache is initially empty. Suppose that the processor fetches 4352 words from locations 0, 1, 2,..., 4351, in that order. It then repeats this fetch sequence nine more times. If the cache is 10 times faster than the main memory, estimate the improvement factor resulting from the use of the cache. Assume that the LRU algorithm is used for block replacement.

LO1