41. This problem is a project to write a simulator in C for the Pep/9 computer.

(a) Write a loader that takes a Pep/9 object file in standard format and loads it into the main memory of a simulated Pep/9 computer. Declare main memory as an array of integers as follows:

int Mem[65536]; // Pep/9 main memory Take your input as a string of characters from the standard input. Write a memory dump function that outputs the content of main memory as a sequence of decimal integers that represents the program. For example, if the input is D1 00 0D F1 FC 16 D1 00 0E F1 FC 16 00 48 69 zz as in Figure 4.42, then the program should convert the hexadecimal numbers to integers and store them in the first 15 cells of Mem. The output should be the corresponding integer values as follows:

209 0 13 241 252 22 209 0 14 241 252 22 0 72 105

(b) Implement instructions LDBr, STBr, and STOP and addressing modes immediate and direct.

Use Figure 4.32 as a guide for implementing the von Neumann execution cycle. If an instruction stores a byte to Mem[FC16], output the corresponding character to the standard output stream. If an instruction loads a byte from Mem[FC15], input the corresponding character from the standard input stream. For example, with the input as in part (a), the output should be Hi.

(c) Implement DECO as if it were a native instruction. That is, you should not implement the trap mechanism described in Section 8.2.

(d) Implement instructions BR, LDWr, STWr, SUBSP, and ADDSP and addressing mode stack relative. Test your implementation by assembling the program of Figure 6.1 with the Pep/9 assembler, then inputting the hexadecimal program into your simulator. The output should be BMW335i.

(e) Implement instructions ADDr, SUBr, ASLr, and ASRr. Implement instructions DECI and STRO as if they were native instructions. Take the input from the standard input stream and send your output to the standard output stream of C. Test your implementation by executing the program of Figure 6.4.

(f) Implement the conditional branch instructions BRLE, BRLT, BREQ, BRNE, BRGE, BRGT, BRV;

the unary instructions NOTr and NEGr; and the compare instructions CPWr and CPBr. Test your implementation by executing the programs of Figures 6.6, 6.8, 6.10, 6.12, and 6.14.

(g) Implement instructions CALL and RET. Test your implementation by executing the programs of Figures 6.18, 6.21, 6.23, and 6.25.

(h) Implement instruction MOVSPA and addressing mode stack relative deferred. Test your implementation by executing the programs of Figures 6.27 and 6.29.

(i) Implement addressing modes indexed, stack-indexed, and stack-deferred indexed. Test your implementation by executing the programs of Figures 6.34, 6.36, 6.38, 6.40, and 6.48.

(j) Implement the indirect addressing mode. Test your implementation by executing the program of Figure 6.42.