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Use the diagram shown in FIGURE 3 to briefly explain the fetch/execute cycle of a microprocessor for the instruction 32 00 BC. The instruction is

Use the diagram shown in FIGURE 3 to briefly explain the fetch/execute cycle of a microprocessor for the instruction 32 00 BC. The instruction is stored in memory locations 1661 to 1663. The op code means 'store the contents of the accumulator in memory address location'. The address given is in the reverse order. The contents of the accumulator are 78H. Indicate the contents of the PC, AS, registers, accumulator and address BC00 after the cycle is completed.

MAR PC. CONTROL SIGNALS ADDRESS BUS 16 61 TTT'T I DATA BUS IR 32 TEMP 8 BIT REGISTER 16 BIT REGISTER A.L.U. 78 READ -165E 165F 1660 1661 1662 663 BC00 Memory 32 00 BC

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