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Consider a virtual memory system with 52-bit virtual address, 30-bit physical address, and 4KB page size.
(a) If TLB is 4way-set associative and TLB index is <8> bits, what is the total size of the TLB (tag plus data)?(c) What is the size of the physical memory space?
I have doubts regarding four way set associative for TLB, so with regular cache system, the cache index decreases, cache tag increase, and the block offset remains. Is that the same case for TLB ? Please show your steps , and don't copy from Chat-GPT
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