1) 2) 3) 4) Source input (0 / 1 / x / D3 / D6 / D10 / D13) Y (0 / 1 / x / D3 / D6 / D10 / D13)

For active-low S'-R' latch, which input will give an invalid output? S' = 1, R' = 0 S' = 0, R' = 1 0 S' = R' = 1 S' = R' = 0 Which of the following statements is TRUE about Full Adder and Parallel Adder? Full adder consists of Parallel Adder and basic gate. Full adder has 2 input and 3 output. Parallel Adder is implemented using only one Full Adder. Ripple carry adder is one type of Parallel Adder. GBO Cp4 GB3 A>BH A=BHE GAO A