1)

a) All memory hierarchies have levels whereby either hardware or software determines whether to bring in

data from the lower level to the higher level. What governs whether hardware or software is in charge

of data movement? Name two levels where software is in charge. Which software pieces are in charge of

data movement here?

b) What are split private caches? What are unied private caches? What are unied shared caches?

Provide examples of hardware caches of each type with information about their relative access latency

(in cycles) and size (in bytes).

c) Why do hardware caches help performance?

d) What is the dierence between a direct-mapped cache, a fully-associative cache, and a set-associative

cache? For which of these caches do replacement policies matter?

e) Why do we store multiple bytes in a cache line/block/way? What is the typical cache line size on most

processors.

f) How do you calculate cold versus conict versus capacity misses?

g) Consider the following code snippet:

for (int i = 0; i <= N; i++)

a[i] = b[i] + c[i];

How does this code snippet demonstrate examples of temporal and spatial locality? Be sure to consider

memory references for both data and instructions.