1. A computing system is connected to a word addressable memory of size of 32GB which has 32 bi- directional data pins (means read and write can be done one word at a time). This memory needs one clock cycle to complete any read/write request. A back to back read (or write) request can be done by the processor (i.e. issuing read operation to memory while it is processing data of previous read) but write after read must wait for a clock cycle. This memory is running with 1.2 GHz clock. a. How many address ports/pins are there in this memory device? [3pts] b. What is the clock period in 'ns' unit of the clock that drives this memory? [2pts) c. If there are 4 million 64-bit data transaction in this system between processor and memory with 25% write operation mix with 0.1 probability of having a write operation immediately succeeding a read, what is the total time of this data transaction in 'ms unit? [15pts