1. A shift register, as shown below, is a cascade of flip flops, sharing the same clock, in which the output of each flip-flop is connected to the 'data' input of the next flip-flop in the chain, resulting in a circuit that shifts by one position the bit array' stored in it, shifting in' the data present at its input and 'shifting out' the last bit in the array, at each transition of the clock. Suppose we have two shift registers, each holding a 4-bit number. Design a circuit to add these two 4-bit numbers and write the result back onto the first one, which in this accumulator 23 serves as an case 02 24 Data In Clock 2. Design a 4-bit BCD counter using four D flip-flops with an additional input called DS (double speed); when DSis 1 the counter advances in steps of two. For example, if the current BCD value is 3 and DS is changed from 0 to 1, in the next clock cycle the counter will have a BCD value of 5 (instead of 4)