1. A trap, which is an interrupt initiated by the CPU, can be caused by all of the following EXCEPT:

a) illegal memory bounds errors

b) illegal instructions

c) attempt to access a restricted I/O device in the User Mode

d) attempt to execute a privileged instruction in the User Mode

e) attempt to load an ISA (general) register, such as EAX, with the value 0

2.An ISA instruction can consist of:

a) opcodes, traps and flags

b) opcodes and operands

c) operand, stack frame and L2 cache

d) sequencer, program counter & address

e) interrupts, traps and faults

3. The PSW (Program Status Word) has flag bits. These are important bits which:

a) reflect the general state of the CPU

b) are used to determine address of operand

c) control the flow of the data through the PCI bridge

d) stores the next instruction from the PC pre-fetch unit

e) indicate the number of clusters on the hard drive

4. All are functions of the operating system EXCEPT:

a) create processes

b) write a self-modifying process in assembly language

c) stop/start a process

d) delete processes

e) manage file I/O

5. Which of the following is generally not true about the ISA architecture Level?

a) it is usually backwards compatible.

b) should define instructions that can be efficiently implemented over generations of processors.

c) it contains specialized instructions to control hard disk drives directly

d) should be cleanly designed so that compilers can produce good code

e) it is designed by the architects of the processor