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1. Assume for arithmetic, load/store, and branch instructions, a processor has CPis of 1, 12, and 10, respectively. Also, assume that on a single processor,

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1. Assume for arithmetic, load/store, and branch instructions, a processor has CPis of 1, 12, and 10, respectively. Also, assume that on a single processor, a program requires the execution of 2.56E9 arithmetic instructions, 1.28E9 load/store instructions, and 200 million branch instructions. Assume that each processor has 2 GHz clock frequency. Assume that as the program is parallelized to run over multiple cores, the number of arithmetic and load/store instructions per processor is divided by 0.6p (where p is the number of processors) but the number of branch instructions per processor remains the s ame. Find the total execution time for this the relative speedup of the 8, 16, and 32 processors result relative to the single processor result. If the CPI of the arithmetic instructions was doubled, what would the impact be on the execution time of the program on 1, 8, 16 or 32 processors? To what should the CPI of arithmetic instructions be reduced in order for a single processor to match the performance of four processors using the original CPI values? a. program on 1, 8, 16 and 32 processors, and show b. c

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