1

CALCULATE COST:

You are a company how wants to manufacture 20.000 devices. You can use FPGA or ASICs.

FPGA chosen: Initial cost $5.000 + ($100 for each device);

ASIC chosen: Initial cost $5.000.000 + ($10 for each device).

Which is more efficient? Would the efficient one change if there were 2.000.000 devices to be made?

What are the overall costs for each unit in each design?

Please show every step and explanation in your answers.

2

TRANSISTORS

X Simply the function as much as possible:

F = abcd + abcd + abcd + abcd + abcd + abcd + abcd + abcd + abcd + abcd + abcd + abcd

Y Show the input output using a table or map for the following function:

F = bcd + bce + adf + bdf + def

Z Use the least number of transistors, show the CMOS gate that represents the function in part Y. You can use complemented or uncomplemented inputs. Show every step and explain.

3

Design a FSM that outputs 1 for consecutive 1 inputs and 0 otherwise. Think it accepts 1 bit at each time interval.

Example 1 Example 2

Input 00011010111 01101011101

Output 00001000011 00100001100

V Make the state diagram for MOORE DESIGN!

W Give state transition and encoded transition tables.

X Give mathematical equations for the output and the next state.

Y Think your system is working with a clock of 1 kHz, give timing diagram for sequence: 0011010101110. Please Show all critical time points for the Clock, Input, Output.

Z Give the Verilog code