1. Consider a two way set associative cache with 8K memory for storing data. Each line in the cache stores 4 bytes of data. a. How many lines and how many sets does the cache have? b. The cache is used with a computer having a 18 bit address bus. Illustrate how the CPU address is divided into the TAG, SET, and OFFSET fields. Also indicate the number of bits in each field. c. Calculate the total number of memory bits used in the cache, including all the lines, the tags, and valid bit for each line.

2. Consider a two way set associative cache with 1024 lines and 8 bytes per line a. How many sets does the cache have? b. The cache is used with a computer having a 16 bit address bus. Illustrate how the CPU address is divided into the TAG, SET, and OFFSET fields. Indicate the number of bits in each field. c. Calculate the cache data size, in bytes d. Calculate the total number of memory bits used in the cache, including all the lines, the tags, and valid bit for each line.