1. Consider the assembly snippet shown. multiply ; L.D takes 1 cycle F6, 32 (R2) F2, 44 (R3) 2 L. 3 MUL.D FO FO, F2, 4 SUB.D F, F2, 5 DIV.D F10, FO, 6 ADD.D F6, F8, F46 cycles F6 2 cycles F612 cycles F2 2 cycles It is assumed that after the first load instruction, the memory is busy and not available to the processor at least at the 6th cycle. At the 6th cycle, the tables are shown ([Rx] means the content of register Rx) RS idBusyOpQ no L.D yes | MILD | 102 yes | SUBD | 102 R3] 44+R3] F4] F6 102 es 80 23 es 52 yes | ADDD? 23 102 Fo 80 F6 52 F10 F12 F2 102 Field F4. F8 F31 a. At the 20th cycle, the second load just placed the data on the CDB. Therefore, at 21st cycle, reservation station 102 is released and instructions that require the second load result get the result from the CDB and start execution of their respective operations. Show the table at the 21th clock cycle. b. The SUB.D executes the subtraction during cycle 21 and 22, places the result on CDB at cycle 23. Show the table at the 24th clock cycle. c. Show the table the 27th clock cycle. d. At what cycle, instruction MULT.D places result on CDB? e. If reservation station for instruction MULTD is released at cycle 24, at what cycle instruction DIVD finishes execution? f. At cycle 100, show the tables. 1. Consider the assembly snippet shown. multiply ; L.D takes 1 cycle F6, 32 (R2) F2, 44 (R3) 2 L. 3 MUL.D FO FO, F2, 4 SUB.D F, F2, 5 DIV.D F10, FO, 6 ADD.D F6, F8, F46 cycles F6 2 cycles F612 cycles F2 2 cycles It is assumed that after the first load instruction, the memory is busy and not available to the processor at least at the 6th cycle. At the 6th cycle, the tables are shown ([Rx] means the content of register Rx) RS idBusyOpQ no L.D yes | MILD | 102 yes | SUBD | 102 R3] 44+R3] F4] F6 102 es 80 23 es 52 yes | ADDD? 23 102 Fo 80 F6 52 F10 F12 F2 102 Field F4. F8 F31 a. At the 20th cycle, the second load just placed the data on the CDB. Therefore, at 21st cycle, reservation station 102 is released and instructions that require the second load result get the result from the CDB and start execution of their respective operations. Show the table at the 21th clock cycle. b. The SUB.D executes the subtraction during cycle 21 and 22, places the result on CDB at cycle 23. Show the table at the 24th clock cycle. c. Show the table the 27th clock cycle. d. At what cycle, instruction MULT.D places result on CDB? e. If reservation station for instruction MULTD is released at cycle 24, at what cycle instruction DIVD finishes execution? f. At cycle 100, show the tables
