1- Design a PLA for the following functions F1= A+BC F2= AC +AB F3= BC +AB F4= +

2- Design a counter with Dflip flops that goes through the following binary repeated sequence:0, 1, 7, 5, 3, 6. Consider the unused states as dont care conditions a. Derive the state table. b. Draw the logic diagram

3- How many 64K 32 chips are needed to provide a RAM of 1M 64? How many address lines are required to access this 1M 64 memory? What is the total capacity in bits of this 1M 64 memory? Specify the size of the decoder Implement the RAM chip and specify all the inputs and outputs.