1) It is desired to add the following instructions to the MIPS ISA:

b) jr $r - un-conditional jump to the address specified by $r

For each of these instructions, consider the single cycle execution diagram depicted in Figure 1. If needed, then add the minimum hardware that enables executing the instruction to the diagram, show the RTL for the new instructions, and specify the setting of the control lines.

Instruction [25-0] (Shit Instruction 125-01 (Shit Jump ad 26 left 2 Shift Jump address [31-0] 28 PC 4 [31-28] Add Ll Add, ALU result 4 Shift left 2 RegDst Jum Branch MemRead Instruction [31-26)] Control MemtoRe MemWrit ALUSrc RegWrite Instruction [25-21] | Read . register 1 Read Read data 1 Read xregister data 2 data Registers PRead address Instruction [20-16] Read Zero ALU ALU result Instruction register 2 [31-0] Address Read data MWrite Instruction Instruction [15-11]x regist Write LI memony LI Write Data data memory 16 Sign- extend Instruction [15-0] 32 ALU control Instruction [5-0] Figure 1, The MIPS Single Cycle Execution Diagram