(1 pt) Fill out the A and B columns in the following truth table: in (2 pt) Using a combination of the three primitive gates you have already developed (i.e. AND, OR, and NOT), draw out the gate layout for a DMUX with a single bit input ( in), one select bit (S), and two single bit outputs ( A and B). Make it so that when S is 0, the output A is the same as the input, and when it is 1, B is the same as the input. Copy it to the space below, resizing it as necessary: (1 pt) Fill out the A and B columns in the following truth table: in (2 pt) Using a combination of the three primitive gates you have already developed (i.e. AND, OR, and NOT), draw out the gate layout for a DMUX with a single bit input ( in), one select bit (S), and two single bit outputs ( A and B). Make it so that when S is 0, the output A is the same as the input, and when it is 1, B is the same as the input. Copy it to the space below, resizing it as necessary