1. Suppose a computer using direct mapped cache has 2³² words of main memory and a cache of 1024 blocks, where each cache block contains 32 words.

a. How many blocks of main memory are there?

b. What is the format of a memory address as seen by the cache, that is, what are the sizes of the tag, block, and word fields?

c. To which cache block will the memory reference 000063FA₁₆ map?

2. Suppose a computer using fully associative cache has 2²⁴ words of main memory and a cache of 128 blocks, where each cache block contains 64 words.

a. How many blocks of main memory are there?

b. What is the format of a memory address as seen by the cache, that is, what are the sizes of the tag and word fields?

c. To which cache block will the memory reference 01D872₁₆ map?

3. A 2-way set associative cache consists of four sets. Main memory contains 2K blocks of eight words each.

a. Show the main memory address format that allows us to map addresses from main memory to cache. Be sure to include the fields as well as their sizes.

b. Compute the hit ratio for a program that loops 3 times from locations 8 to 51 in main memory. You may leave the hit ratio in terms of a fraction

4. Suppose a computer using set associative cache has 2²¹ words of main memory and a cache of 64 blocks, where each cache block contains 4 words.

a. If this cache is 2-way set associative, what is the format of a memory address as seen by the cache, that is, what are the sizes of the tag, set, and word fields?

b. If this cache is 4-way set associative, what is the format of a memory address as seen by the cache?

Suppose a process page table contains the entries shown below. Using the format shown in Figure 6.15a, indicate where the process pages are located in memory.

Frame Valid Bit