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1 . Suppose the memory cells at addresses 0 0 through 0 D in the machine described in Appendix C contain the following bit patterns:

1. Suppose the memory cells at addresses 00 through 0D in the machine described in
Appendix C contain the following bit patterns:
Assume that the machine starts with its program counter containing 00.
a. What bit pattern will be in register 0 when the machine halts?
b. What bit pattern will be in register 1 when the machine halts?
c. What bit pattern is in the program counter when the machine halts?
2. Suppose the memory cells at addresses 20 through 28 in the machine described in
Appendix C contain the following bit patterns:
Assume that the machine starts with its program counter containing 20.
a. What bit patterns will be in registers 0,1, and 2 when the machine halts?
b. What bit pattern will be in the memory cell at address 30 when the machine
halts?
c. What bit pattern will be in the memory cell at address BO when the machine
halts?
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