1. Suppose we have an 8 KB* cache with 32 byte cache lines. How many cache entries are there?

* 1KB = 1024 bytes

2. Suppose we have two systems, each with a cache with four locations. In System 1, our cache is direct-associative (or 1-associative). In System 2, our cache is fully associative.

How many more cache locations can an address be mapped to in System 2 than in System 1?

3. In the ER broadcast algorithm, suppose processor P3 fails after the second iteration of the for loop, but magically all other processor and the rest of the system continue to function. Which CPUs would not receive the correct value?

P1

P2

P3

P4

P5

P6

P7

P8

P9

P10

P11

P12

P13

P14

P15

P16