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1. This problem concems the design of a digital system which multiplies two binary mumbers by the re- peated addition method The block diagram of

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1. This problem concems the design of a digital system which multiplies two binary mumbers by the re- peated addition method The block diagram of the system is shown below. When a start signal (St) is set to 1, the accumulator is cleared and the multiplier is loaded into a counter. The multiplicand is then added to the accumulator and the counter is decremented until the multiplication is complete. The control then goes to a stop state and turns on a completion signal (X). The circuit then resets when St is changed back to 0. Draw an SM chart for the control circuit which has 3 states. Control signals are defined as follows: C-clear accumulator D- decrement counter Z- 1 when the count is 0 L- load multiplier A-add multiplicand to accumulator Control*-St Ad DI Circuit Clk Clk Adder Dec Counter Multiplicand Multiplier 1. This problem concems the design of a digital system which multiplies two binary mumbers by the re- peated addition method The block diagram of the system is shown below. When a start signal (St) is set to 1, the accumulator is cleared and the multiplier is loaded into a counter. The multiplicand is then added to the accumulator and the counter is decremented until the multiplication is complete. The control then goes to a stop state and turns on a completion signal (X). The circuit then resets when St is changed back to 0. Draw an SM chart for the control circuit which has 3 states. Control signals are defined as follows: C-clear accumulator D- decrement counter Z- 1 when the count is 0 L- load multiplier A-add multiplicand to accumulator Control*-St Ad DI Circuit Clk Clk Adder Dec Counter Multiplicand Multiplier

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