Question
1. What is the difference between multiprogramming and multiprocessing? Multiprogramming and multithreading? 2. Why should assembly language be avoided for general application development? Under what
1. What is the difference between multiprogramming and multiprocessing? Multiprogramming and multithreading?
2. Why should assembly language be avoided for general application development? Under what circumstances is assembly language preferred or required?
3. Under what circumstances would you argue in favor of using assembly language code for developing an application program?
4. What are the advantages of using a compiled language over an interpreted one? Under what circumstances would you choose to use an interpreted language?
5. A RISC processor has 152 total registers, with 12 designated as global registers. The 10 register windows each have 6 input registers and 6 output registers. How many local registers are in each register window set?
6. Indicate whether each of the following applies to CISC or RISC by placing either a C (for CISC) or an R (for RISC) in the blank.
_____ Simple instructions averaging one clock cycle to execute.
_____ Single register set.
_____ Complexity is in the compiler.
_____ Highly pipelined.
_____ Any instruction can reference memory.
_____ Instructions are interpreted by the microprogram.
_____ Fixed length, easily decoded instruction format.
_____ Highly specialized, infrequently used instructions.
_____ Use of overlapping register windows.
_____ Relatively few addressing modes.
For problems 7 through 9, consider a CPU that implements two parallel fetch-execute pipelines for superscalar processing. Show the performance improvement over scalar pipeline processing and no-pipeline processing, assuming an instruction cycle similar to figure 4.1 in the Section I B of Advanced Systems Concepts, i.e.:
a one clock cycle fetch
a two clock cycle decode
a three clock cycle execute
and a 50 instruction sequence:
Show your work.
7. No pipelining would require _____ clock cycles:
8. A scalar pipeline would require _____ clock cycles:
9. A superscalar pipeline with two parallel units would require ______ clock cycles:
10.a. What is the essential characteristic of the superscalar approach to processor design?
b. What is the difference between the superscalar and superpipelined approaches?
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