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1. When performing binary addition/subtraction of 2 4-bit 2s complement numbers, you need to keep track of overflow and carry to see if the final
1. When performing binary addition/subtraction of 2 4-bit 2s complement numbers, you need to keep track of overflow and carry to see if the final result is correct. Assuming the C1, C2, C3,C4,C5 are the carry bit for the 1st, 2nd, 3rd, 4th and 5th position, how can you tell if the final result is correct? How would you implement this using logic gates?
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