1) Write the VHDL program that takes the mode of an entered by two numbers the first one is A number (A number can be between 0-99) the second number b which is entered by the user. if the result of the mode is (even) it will increase the variable "even". likewise, the result of the mode is odd, it increases the variable "odd" and gives the output of these values.

2) Draw the ASM chart of the code you wrote. Experiment with 3 numbers in the models. (You should do this homework without using the mod function)

3) simulation from Modelism programme is required as pictures

Use clock, start and reset inputs. klar means (outputs)

B Reset CIK Start Vhdl kod klar B Reset CIK Start Vhdl kod klar