11 LW 12. ADDI DOR 14 DW 15 SUB 11: DW 43 13. OR 14: LW IS: SUB Question & MIPS &-Stage Pipetine For this qontin 11: B, Kha) 12,811, 2 ht. B, 34-4(2) 22 mb , Fi, 844 kyland architecture Show calculations Map 1, 10, EX, M. and W. Each p The Bull (b) Calculate how many clock cycles will take the execution forwarding when the rest of the besods instruction Show the timing of coe loop cycle is the Pigm below 2 3 ake excution of s (c) Calculate how many clock cycles will tale execution Sorweyding when the result of the branch Instruct the stage Show the timing of one loop cycle 12345678910 et on the simple pipeline withous ) is available after the WB stage 4 15 16 17 18 ent on the simple pipeline with normal PC content) is available after completion of 2 13 14 15 16 17 18 19 20 1 43 Question a MIPS &-Stage Pipeline Jepal he thin Od 22: ADDE DE OR 14: DW 15: SUB NO) 12 w B2, BL D 8, 2 34-43) 12: LW DE ADDI OR 14 LIV IS: SUB owing MIP de that (b) Calculate how many clock sysles will take the execution forwarding when the rest of the branch instruction ( Show the timing of one loop cycle is the Figure below 22 930 11 (c) Calculate how many clock cycles will take execution Inwending when the result of the branch instruct the ID stage Show the timing of coe loop cycle 123 4 5678910 P., (A) Calculate how many cock cycis will take action of architecture Show calculations The li ment on the simple pipeline without 34 35 36 17 18 pent on the simple pipeline with normal PC content) is available after completion of igane below. 2 13 14 15 16 17 16 19 20