1 (10 ) Memory Hierarchy Suppose we have a processor with a base CPI of 2 0, and all the references hit in the primary, and a clock rate of 5 GHz Assume a main memory access time of 100 ns, including miss handling Suppose the miss rate per instruction is 2 How much faster will the processor be if we add a secondary cache that has a 10 ns access time for either a hit or a miss and is large enough to reduce the miss rate to main memory to 0 25 2 (25 ) Caches 3 1 (10 ) Given a 64KB 2 way L1 write back cache running on a 32 bit architecture We know the number of sets of this cache is 512 Please derive the total size of entire tag array (You dont need to consider Valid and Dirty bits ) (5 ) Based on Problem 3 1, if we only change the number of ways from 2 to 7, can we do that If we do, what will be the capacity (in KB) of the new cache Please explain your answer (10 ) Below is a sequence of MIPS operations to be performed Fill in the direct mapped cache (8 sets) table below based on the MIPS operations lw $0, 01101100 A lw $1, 01011100 B lw $2, 01111000 C lw $3, 00010100 D Index Valid Tag Data Dirty 000 001 010 011 100 101 110 111 3 Virtual Memory (25 ) Assume an Inverted Page Table (8 entry IPT) is used by a 32 bit OS The memory page size is 2MB The complete IPT content is shown below The Physical Page Number (PPN) starts from 0 to 7 from the top of the table There are three active processes, P1 (PID 1), P2 (PID 2) and P3 (PID 3) running in the system and the IPT holds the translation for the entire physical memory Answer the following questions Valid Process ID (PID) Virtual Page Number (VPN) 1 1 0x3fe 1 3 0x001 1 2 0x1ad 1 3 0x7fd 1 2 0x3fe 1 1 0x2bf 0 2 0x7fd 1 2 0x0bf (5 ) Based on the size of the Inverted Page Table above, what is the size (in MB) of the physical memory (10 ) To which physical address does the virtual address 0x7fdd8f64 of P2 map Please derive and write down the complete address in Hex value (If there is no valid mapping, please answer page fault) (10 ) To which virtual address , of which process , does the physical address 0x78e968 map Please derive and write down the complete address in Hex value If you cannot find a valid mapping, please answer addre

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1.(10%) Memory Hierarchy Suppose we have a processor with a base CPI of 2.0, and all the references hit in the primary, and a clock

1.(10%) Memory Hierarchy

Suppose we have a processor with a base CPI of 2.0, and all the references hit in the primary, and a clock rate of 5 GHz. Assume a main memory access time of 100 ns, including miss handling. Suppose the miss rate per instruction is 2%. How much faster will the processor be if we add a secondary cache that has a 10 ns access time for either a hit or a miss and is large enough to reduce the miss rate to main memory to 0.25%?

2.(25 %) Caches

3.1. (10%) Given a 64KB 2-way L1 write back cache running on a 32-bit architecture. We know the number of sets of this cache is 512. Please derive the total size of entire tag array. (You dont need to consider Valid and Dirty bits.)

(5%) Based on Problem 3.1, if we only change the number of ways from 2 to 7, can we do that?

If we do, what will be the capacity (in KB) of the new cache? Please explain your answer.

(10%) Below is a sequence of MIPS operations to be performed. Fill in the direct-mapped cache (8 sets) table below based on the MIPS operations.

lw $0, #01101100 [A] lw $1, #01011100 [B] lw $2, #01111000 [C] lw $3, #00010100 [D]

Index	Valid	Tag	Data	Dirty
000
001
010
011
100
101
110
111

3.Virtual Memory (25%)

Assume an Inverted Page Table (8-entry IPT) is used by a 32-bit OS. The memory page size is 2MB. The complete IPT content is shown below. The Physical Page Number (PPN) starts from 0 to 7 from the top of the table. There are three active processes, P1 (PID=1), P2 (PID=2) and P3 (PID=3) running in the system and the IPT holds the translation for the entire physical memory. Answer the following questions.

Valid	Process ID (PID)	Virtual Page Number (VPN)
1	1	0x3fe
1	3	0x001
1	2	0x1ad
1	3	0x7fd
1	2	0x3fe
1	1	0x2bf
0	2	0x7fd
1	2	0x0bf

(5%) Based on the size of the Inverted Page Table above, what is the size (in MB) of the physical memory?

(10%) To which physical address does the virtual address 0x7fdd8f64 of P2 map? Please derive and write down the complete address in Hex value. (If there is no valid mapping, please answer page fault)

(10%) To which virtual address, of which process, does the physical address 0x78e968 map? Please derive and write down the complete address in Hex value. If you cannot find a valid mapping, please answer addre