12. Assume that the cache size is 512 kB, and each cache line is 128 Bytes. (1) If it's a 4-way associative cache, how many sets are there? If it's a 2-way associative cache, how many sets are there? (10%) (2) Let's assume the cache is initially empty, and LRU policy is used for cache line replacement. If the following memory blocks are accessed: Mem-block #7, 1031, 2055, 4103, 1031, 7, 2055, 3079, 1031, 3079 What is the cache hit/miss rate if the cache is 4-way associative? Put Hit or Miss in the blanks in the table below. (5%) 7 1031 2055 4103 1031 7 2055 3079 1031 3079 (3) Given the same conditions as the question above, what is the cache hit/miss rate if the cache is 2-way associative? Put Hit or Miss in the blanks in the table below. (5%) 7 1031 2055 4103 1031 7 2055 3079 1031 3079