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1.2.3 Tables 1.2.2(a-b) provide the truth tables corresponding to a 3-Input minority-voter and 3-input even-detector. Table 1.2.2. (a) 3-input Minority-voter (b) 3-input Even-detector a b
1.2.3 Tables 1.2.2(a-b) provide the truth tables corresponding to a 3-Input minority-voter and 3-input even-detector. Table 1.2.2. (a) 3-input Minority-voter (b) 3-input Even-detector a b MV-out a b C EV-out a b c 0 0 ) Explain briefly in words the function of each logic block represented by the truth tables (a) and (b) i.e. describe the condition for which the output becomes 1 for each function. l) Using AND, OR, and inverter gates, derive a Boolean expression for each of the two outputs as a function of the inputs MV-out (a, b, c)- .EV-out (a, b, c) ill) Draw the logic schematics corresponding to your answers in (i) iv) Given the logic XOR function in 1.2.2, redesign the EV-out' output using XOR gates only
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