16) Assume a simple single instruction lookahead issuing scheme for instruction-level parallel processing while preserving apparent sequentiality in which the control unit issues consecutive instructions until a hazard is detected. At that point, issuing stops until the blocked statement can execute. Show the instruction schedule for the stream si to S7 for the two multi-function hardware configurations below. Also, show the statement number and type of hazard on which issuing is blocked for each time segment. S1: A = B+C S2: D = E + F S3: G= A*Y S4: Z = H + G S5 W = 1 * J S6: F = W *Z S7: H= K*L a) CASE 1: Two adders and one multiplier unit available. [2 pts] Time 1 2 3 4 5 Adder 1 Adder 2 Multiplier Hazard: b) CASE 2: Two adders and two multiplier units available [2 pts] Time 1 2 3 4 5 Adder 1 Adder 2 Multiplier 1 Multiplier 2 Hazard: c) CASE 3: Four adders and four multiplier units available [2 pts] Time 1 2 3 4 5 Adder 1 Adder 2 Adder 3 Adder 4 Multiplier 1 Multiplier 2 Multiplier 3 Multiplier 4 Hazard: 16) Assume a simple single instruction lookahead issuing scheme for instruction-level parallel processing while preserving apparent sequentiality in which the control unit issues consecutive instructions until a hazard is detected. At that point, issuing stops until the blocked statement can execute. Show the instruction schedule for the stream si to S7 for the two multi-function hardware configurations below. Also, show the statement number and type of hazard on which issuing is blocked for each time segment. S1: A = B+C S2: D = E + F S3: G= A*Y S4: Z = H + G S5 W = 1 * J S6: F = W *Z S7: H= K*L a) CASE 1: Two adders and one multiplier unit available. [2 pts] Time 1 2 3 4 5 Adder 1 Adder 2 Multiplier Hazard: b) CASE 2: Two adders and two multiplier units available [2 pts] Time 1 2 3 4 5 Adder 1 Adder 2 Multiplier 1 Multiplier 2 Hazard: c) CASE 3: Four adders and four multiplier units available [2 pts] Time 1 2 3 4 5 Adder 1 Adder 2 Adder 3 Adder 4 Multiplier 1 Multiplier 2 Multiplier 3 Multiplier 4 Hazard