16. Design an SR flip-flop circuit using NAND gates. The circuit should have synchronous Set (S) and Reset (R) inputs and operate as follows: If S=1 and R=0, the flip-flop should be set (Q=1,Q=0). If S=0 and R=1, the flip-flop should be reset (Q=0,Q=1). If both S and R are 0 , the flip-flop should maintain its previous state. If both S and R are 1 , the behavior is undefined. Use NAND gates in your design. Hint: Design the truth table and show the next state. 16. Design an SR flip-flop circuit using NAND gates. The circuit should have synchronous Set (S) and Reset (R) inputs and operate as follows: If S=1 and R=0, the flip-flop should be set (Q=1,Q=0). If S=0 and R=1, the flip-flop should be reset (Q=0,Q=1). If both S and R are 0 , the flip-flop should maintain its previous state. If both S and R are 1 , the behavior is undefined. Use NAND gates in your design. Hint: Design the truth table and show the next state