1.6 Parity generation and checking An n-input even-parity generator produces a 1 output iff an odd number of its inputs are 1s. The circuit is so named because attaching the produced output to the n-bit input yields an even-parity (n + 1)-bit word. An n-input even-parity checker produces a 1 output (error signal) iff an odd number of its inputs are ls. a. Design an 8-input even-parity generator using only XOR gates. b. Repeat part a for an odd-parity generator. c. Design a 9-input even-parity checker using only XOR gates. How is your design related to those in parts a and b? d. Repeat part c for an odd-parity checker. e. Show that the fastest parity generator circuits can be built in a recursive manner, basing the design of an n-input circuit on two (n/2)-input circuits of suitable types. What happens when n is odd