1A. Starting with the single cycle implementation of ANNA discussed in class, make necessary modifications to support the jalr instruction. You cannot modify the ALU, register file, or either memory. The other twelve instructions must work in the modified datapath. (15+ 15) A. Describe your changes. Your changes may include but are not limited to: Adding a mux. Indicate where the mux is located, the inputs to the mux and define a control line Adding an input to existing mux. Indicate the mux that you are adding the control line. Add the new input to the bottom (highest value) of the mux Modifying or adding combinational logic. Potential targets include the branch detection unit, the extension units, and the logic needed to compute the target address. Describe any changes you make in this regard. Fill in the blanks below: Connect the output of Srcl from the register file to the Add combination mux. to BranchType that will select input of the PC select mux Connect the output of PC+ 1 to the bottom input of mux. The corresponding control line (name of control line here) will expand to selecting this new input bits with - Add a mux just before theinput of the register file. The corresponding new control line is called DestSel: 0 selects selects B. List the value for each control signal in the ANNA processor when executing the jalr instruction. Include any new control signals defined in part (a). Branch BcEn wite Mem The Opcode OpSe ALUOp MemEn Sel Sel Sel Write field 1A. Starting with the single cycle implementation of ANNA discussed in class, make necessary modifications to support the jalr instruction. You cannot modify the ALU, register file, or either memory. The other twelve instructions must work in the modified datapath. (15+ 15) A. Describe your changes. Your changes may include but are not limited to: Adding a mux. Indicate where the mux is located, the inputs to the mux and define a control line Adding an input to existing mux. Indicate the mux that you are adding the control line. Add the new input to the bottom (highest value) of the mux Modifying or adding combinational logic. Potential targets include the branch detection unit, the extension units, and the logic needed to compute the target address. Describe any changes you make in this regard. Fill in the blanks below: Connect the output of Srcl from the register file to the Add combination mux. to BranchType that will select input of the PC select mux Connect the output of PC+ 1 to the bottom input of mux. The corresponding control line (name of control line here) will expand to selecting this new input bits with - Add a mux just before theinput of the register file. The corresponding new control line is called DestSel: 0 selects selects B. List the value for each control signal in the ANNA processor when executing the jalr instruction. Include any new control signals defined in part (a). Branch BcEn wite Mem The Opcode OpSe ALUOp MemEn Sel Sel Sel Write field
