2. (20 pts.) Problem 2, Behavioral Components and Structural Top Level ALU: Design the ALU in structural Verilog. Only use the following components: 4-bit NOT, 4-bit Full Adder and 4-bi input/output 2-to-1 MUX. First you need to develop behavioral Verilog module for each of the above three components (3 behavioral modules). Then, you can instantiate these three components to build the ALU. Test the AL functionality by sinulation Include at least two vectors per function. You may re-use the test bench you have created in Lab Hint for Problem 2: Construct three behavioral modules with always blocks with appropriate sensitivity list. Extend NOT and 2-to-1 MUX behavioral codes which have already been discussed in the tutorial to 4-bit blocks. In your final ALU code, you need to instantiate your four-bit 2-to-1 MUX three times for your four-bit 4-to-1 MUX (make sure your selects are corTect). You can also use the below example of always block for 4-bit adder as part of your design (it has to be designed so that you instantiate it in your structural ALU for addition and subtraction depending on your inputs/carry_in): always @ (a or b or c_i) begin assign fc_out, add_out-atbtc_n end 2. (20 pts.) Problem 2, Behavioral Components and Structural Top Level ALU: Design the ALU in structural Verilog. Only use the following components: 4-bit NOT, 4-bit Full Adder and 4-bi input/output 2-to-1 MUX. First you need to develop behavioral Verilog module for each of the above three components (3 behavioral modules). Then, you can instantiate these three components to build the ALU. Test the AL functionality by sinulation Include at least two vectors per function. You may re-use the test bench you have created in Lab Hint for Problem 2: Construct three behavioral modules with always blocks with appropriate sensitivity list. Extend NOT and 2-to-1 MUX behavioral codes which have already been discussed in the tutorial to 4-bit blocks. In your final ALU code, you need to instantiate your four-bit 2-to-1 MUX three times for your four-bit 4-to-1 MUX (make sure your selects are corTect). You can also use the below example of always block for 4-bit adder as part of your design (it has to be designed so that you instantiate it in your structural ALU for addition and subtraction depending on your inputs/carry_in): always @ (a or b or c_i) begin assign fc_out, add_out-atbtc_n end