2. (7 pts) Consider adding the following new instruction to our ISA: Instruction Interpretation: Reg [Rd]Mem [Reg[Rs] +Reg[Rt] LWI Rd, Rs (Rt) LWI adds the integer in Rs to the address in Rt (Rs holds a constant, Rt holds an address), and loads that address's contents from memory into Rd. a. Which blocks (if any) do we need for this instruction? Mark your answers below: Program Counter Instruction Memory COSC 2440 Computer Organization and Architecture Register number ports: Read Read 2 Write Main ALU Data Memory PC Adder PC Branch Adder Register Write Port (just the port on which data arrives to be written) b. Do we need new functional blocks for this instruction? Yes No c. Do we need any new signals from the control unit for this instruction? Yes No 2. (7 pts) Consider adding the following new instruction to our ISA: Instruction Interpretation: Reg [Rd]Mem [Reg[Rs] +Reg[Rt] LWI Rd, Rs (Rt) LWI adds the integer in Rs to the address in Rt (Rs holds a constant, Rt holds an address), and loads that address's contents from memory into Rd. a. Which blocks (if any) do we need for this instruction? Mark your answers below: Program Counter Instruction Memory COSC 2440 Computer Organization and Architecture Register number ports: Read Read 2 Write Main ALU Data Memory PC Adder PC Branch Adder Register Write Port (just the port on which data arrives to be written) b. Do we need new functional blocks for this instruction? Yes No c. Do we need any new signals from the control unit for this instruction? Yes No