2. a. Write MIPS code to perform addition of two unsigned numbers in registers $t1 and St2 and then verify whether the result has overflowed the 32-bit long destination register $13. Explain the overflow logic with comments to elaborate upon each line of MIPS code. (2 Marks) b. Indicate with a diagram how the same logic can be implemented in hardware. (1 Mark) c. Explain with a flow chart and architecture diagram hardware efficient division algorithm may be performed (3 Marks) (1 Mark) d. Explain why massively parallel implementation of the division algorithm not possible?